ARM base instruction -- madd
Multiply-Add multiplies two register values, adds a third register value, and writes the result to the destination register.
乘法-加法将两个寄存器值相乘，将第三个寄存器值相加，并将结果写入目标寄存器。
32-bit variant
Applies when sf == 0.
MADD <Wd>, <Wn>, <Wm>, <Wa>
64-bit variant
Applies when sf == 1.
MADD <Xd>, <Xn>, <Xm>, <Xa>
Decode for all variants of this encoding
integer d = UInt(Rd);
integer n = UInt(Rn);
integer m = UInt(Rm);
integer a = UInt(Ra);
integer destsize = if sf == '1' then 64 else 32;
Operation
bits(destsize) operand1 = X[n];
bits(destsize) operand2 = X[m];
bits(destsize) operand3 = X[a];
integer result;
result = UInt(operand3) + (UInt(operand1) * UInt(operand2));
X[d] = result<destsize-1:0>;